Tuesday
29 Sep
15:40
ASML Workshop + networking drink
Lecture Hall E & faculty bar, 'de Atmosfeer' | Board
Ready to work on cutting-edge technology? How do you keep in-resist printed chip designs accurate at nanometer scale, when every process step slightly deforms it? That’s the challenge waiting for you. At ASML, wafer deformation is measured using advanced alignment sensors and smart algorithms. But the current approach still has limitations… and that’s where you come in. After each layer, the wafer deforms due to processes like baking and etching. To track this, we print more than 30 markers per layer and measure them with high precision. Based on this data, deformation models are used to describe wafer behavior. The challenge: improve the algorithm and make our models more accurate. Think you can crack this challenge? Join ASML's case-study on September 29 and prove it.